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TDA7562
MULTIFUNCTION QUAD POWER AMPLIFIER WITH BUILT-IN DIAGNOSTICS FEATURES
s s s s
DMOS POWER OUTPUT HIGH OUTPUT POWER CAPABILITY 4x25W/ 4 @ 14.4V, 1KHZ, 10% THD, 4x35W EIAJ MAX. OUTPUT POWER 4x60W/2 FULL I2C BUS DRIVING: - ST-BY - INDEPENDENT FRONT/REAR SOFT PLAY/ MUTE - SELECTABLE GAIN 30dB - 16dB (FOR LOW NOISE LINE OUTPUT FUNCTION) - I2C BUS DIGITAL DIAGNOSTICS FULL FAULT PROTECTION DC OFFSET DETECTION FOUR INDEPENDENT SHORT CIRCUIT PROTECTION CLIPPING DETECTOR PIN WITH SELECTABLE THRESHOLD (2%/10%) ST-BY/MUTE PIN ESD PROTECTION
MULTIPOWER BCD TECHNOLOGY MOSFET OUTPUT POWER STAGE
FLEXIWATT27 (Vertical)
s s s s s s
DESCRIPTION The TDA7562 is a new BCD technology Quad BLOCK DIAGRAM
CLK ST-BY/MUTE
I2CBUS
Mute1 Mute2
Bridge type of car radio amplifier in Flexiwatt27V package specially intended for car radio applications. Thanks to the DMOS output stage the TDA7562 has a very low distortion allowing a clear powerful sound. This device is equipped with a full diagnostics array that communicates the status of each speaker through the I2C bus.The possibility to control the configuration and the behaviour of the device by means of the I2C bus makes TDA7562 a very flexible machine.
DATA
VCC1
VCC2
Thermal Protection & Dump Reference Clip Detector
CD_OUT
IN RF
F
16/30dB
OUT RF+
Short Circuit Protection & Diagnostic
OUT RFOUT RR+
IN RR
R
16/30dB
IN LF
F
16/30dB
Short Circuit Protection & Diagnostic
OUT RROUT LF+
IN LR
R
16/30dB
Short Circuit Protection & Diagnostic
OUT LFOUT LR+ OUT LR-
Short Circuit Protection & Diagnostic
SVR
AC_GND
RF RR
LF LR
TAB
S_GND
PW_GND
May 2003
1/17
TDA7562
ABSOLUTE MAXIMUM RATINGS
Symbol Vop VS Vpeak VCK VDATA IO IO Ptot Tstg, Tj Operating Supply Voltage DC Supply Voltage Peak Supply Voltage (for t = 50ms) CK pin Voltage Data Pin Voltage Output Peak Current (not repetitive t = 100s) Output Peak Current (repetitive f > 10Hz) Power Dissipation Tcase = 70C Storage and Junction Temperature Parameter Value 18 28 50 6 6 8 6 85 -55 to 150 Unit V V V V V A A W C
THERMAL DATA
Symbol Rth j-case Parameter Thermal Resistance Junction to case Value Unit C/W
Max.
1
PIN CONNECTION (Top view)
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
TAB DATA PW_GND RR OUT RRCK OUT RR+ VCC2 OUT RFPW_GND RF OUT RF+ AC GND IN RF IN RR S_GND IN LR IN LF SVR OUT LF+ PW_GND LF OUT LFVCC1 OUT LR+ CD-OUT OUT LRPW_GND LR STBY TAB
D00AU1230
2/17
TDA7562
Figure 1. Application Circuit
C8 0.1F V(4V .. VCC) 2 DATA I2C BUS CLK C1 0.22F IN RF C2 0.22F IN RR C3 0.22F IN LF C4 0.22F IN LR S-GND 13 17 11 5 12 15 16 23 26 C7 3300F Vcc1 7 Vcc2 21 18 19 20 22 25 24 10 9 8 6 3 4 TAB + OUT LR + OUT LF + OUT RR + OUT RF
14
1, 27
47K C5 1F C6 10F CD OUT V
D00AU1231A
3/17
TDA7562
ELECTRICAL CHARACTERISTICS (Refer to the test circuit, VS = 14.4V; RL = 4; f = 1KHz; Tamb = 25C; unless otherwise specified.)
Symbol POWER AMPLIFIER VS Id PO Supply Voltage Range Total Quiescent Drain Current Output Power EIAJ (VS = 13.7V) THD = 10% THD = 1% RL = 2; EIAJ (VS = 13.7V) RL = 2; THD 10% RL = 2; THD 1% RL = 2; MAX POWER THD Total Harmonic Distortion PO = 1W to 10W; f = 1kHz PO = 1-10W, f = 10kHz GV = 16dB; VO = 0.1 to 5VRMS CT RIN GV1 GV1 GV2 GV2 EIN1 EIN2 SVR BW ASB ISB AM VOS VAM TON TOFF VSBY VMU VOP IMU CDLK CDSAT CDTHD Cross Talk Input Impedance Voltage Gain 1 Voltage Gain Match 1 Voltage Gain 2 Voltage Gain Match 2 Output Noise Voltage 1 Output Noise Voltage 2 Supply Voltage Rejection Power Bandwidth Stand-by Attenuation Stand-by Current Mute Attenuation Offset Voltage Min. Supply Mute Threshold Turn ON Delay Turn OFF Delay St-By/Mute pin for St-By St-By/Mute pin for Mute St-By/Mute pin for Operating St-By/Mute pin Current VSTBY/MUTE = 8.5V VSTBY/MUTE < 1.5V Clip Det High Leakage Current Clip Det Sat. Voltage Clip Det THD level CD off CD on; ICD = 1mA D0 (IB1) = 1 D0 (IB1) = 0 5 1 D2/D1 (IB1) 0 to 1 D2/D1 (IB1) 1 to 0 0 3.5 7 20 0 0 300 10 2 15 3 Mute & Play 80 -100 7 Rg = 600 20Hz to 22kHz Rg = 600; GV = 16dB 20Hz to 22kHz f = 100Hz to 10kHz; Vr = 1Vpk; Rg = 600 50 100 90 110 2 100 0 7.5 5 5 100 8 20 20 1.5 5 VS 40 10 15 100 f = 1KHz to 10KHz, Rg = 600 50 60 29.5 -1 15.5 -1 50 15 60 16 32 22 50 32 8 150 35 25 20 55 38 30 60 0.04 0.02 0.02 60 100 30 130 30.5 1 16.5 1 100 30 0.1 0.5 0.05 18 300 V mA W W W W W W W % % % dB K dB dB dB dB V V dB KHz dB A dB mV V ms ms V V V A A A mV % % Parameter Test Condition Min. Typ. Max. Unit
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TDA7562
ELECTRICAL CHARACTERISTICS (continued) (Refer to the test circuit, VS = 14.4V; RL = 4; f = 1KHz; Tamb = 25C; unless otherwise specified.)
Symbol Pgnd Parameter Short to GND det. (below this limit, the Output is considered in Short Circuit to GND) Short to VS det. (above this limit, the Output is considered in Short Circuit to VS) Normal operation thresholds. (Within these limits, the Output is considered without faults). Shorted Load det. Offset Detection Power Amplifier Mode Line Driver Mode VO
2
Test Condition Power Amplifier in Mute or Play, one or more short circuits protection activated
Min.
Typ.
Max. 1.2
Unit V
DIAGNOSTICS (Power Amplifier Mode or Line Driver Mode)
Pvs
Vs -1.2
V
Pnop
1.8
Vs -1.8
V
Lsc
0.5 1.5 1.5 2 2.5
V
I C BUS INTERFACE fSCL VIL VIH Clock Frequency Input Low Voltage Input High Voltage 2.3 400 1.5 KHz V V
5/17
TDA7562
Figure 2. Quiescent Current vs. Supply Voltage
Id (mA) 250 230 210 190 170 150 130 110 90 70 50 8 10 121 Vs (V) 41 6 18 0.01 0.1 1 Po (W) 10 0.1 f = 1 KHz f = 10 KHz Vin = 0 NO LOADS 1 Vs = 14.4 V RL = 4 Ohm 10
Figure 5. Distortion vs. Output Power (4)
THD (%)
Figure 3. Output Power vs. Supply Voltage (4)
Po (W) 70 65 60 55 50 45 40 35 30 25 20 15 10 5 8 9 10 11 12 13 Vs (V) 14 15 16 17 18 THD = 1 % THD = 10 % RL = 4 Ohm f = 1 KHz Po-max
Figure 6. Distortion vs. Output Power (2)
THD (%) 10 Vs = 14.4 V RL = 2 Ohm 1 f = 10 KHz
0.1
f = 1 KHz
0.01 0.1
1 Po (W)
10
Figure 4. Output Power vs. Supply Voltage (2)
Po (W) 80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 8 9
Figure 7. Distortion vs. Output Power (4)
THD (%) 10
Po-max RL = 2 Ohm f = 1 KHz 1 THD = 10 % Vs = 14.4 V RL = 4 Ohm Po = 4 W
0.1 THD = 1 %
10
11
12 Vs (V)
13
14
15
16
0.01 10
100
f (Hz)
1000
10000
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TDA7562
Figure 8. Distortion vs. Frequency (2)
THD (%) 10
90 80 Vs = 14.4 V RL = 4 x 4 Ohm f = 1 KHz SINE n
Figure 11. Power Dissipation & Efficiency vs. Output Power (4, STD, SINE)
Ptot (W) n (%) 90 80 70 60 50 Ptot 40 40 30 20 10 0 26
1
Vs = 14.4 V RL = 2 Ohm Po = 8 W
70 60 50
0.1
30 20 10
0.01 10
100 f (Hz)
1000
10000
0 0 2 4 6 8 10 12 14 Po (W) 16 18 20 22 24
Figure 9. Crosstalk vs. Frequency
CROSSTALK (dB) 90 80 70 60 50 40 RL = 4 Ohm Po = 4 W Rg = 600 Ohm
Figure 12. Power Dissipation vs. Average Ouput Power (Audio Program Simulation, 4)
Ptot (W) 45 40 35 30 25 20 Vs = 14 V RL = 4 x 4 Ohm GAUSSIAN NOISE
CLIP START
30
15
20 10
100 f (Hz)
1000
10000
10 5 0 1 2 Po (W) 3 4 5
Figure 10. Supply Voltage Rejection vs. Freq.
SVR (dB) 90 80 70
Figure 13. Power Dissipation vs. Average Ouput Power (Audio Program Simulation, 2)
Ptot (W) 90 80 70 Vs = 14 V RL = 4 x 2 Ohm GAUSSIAN NOISE
60 50 40 30 Rg = 600 Ohm Vripple= 1 Vpk
60 50 40 30 20
CLIP START
20 10
100 f (Hz)
1000
10000
10 0 0 1 2 3 4 Po (W) 5 6 7 8
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TDA7562
DIAGNOSTICS FUNCTIONAL DESCRIPTION: Detectable conventional faults are: - SHORT TO GND - SHORT TO Vs - SHORT ACROSS THE SPEAKER The following additional features are provided: - OUTPUT OFFSET DETECTION The TDA7562 has 2 operating statuses: 1)) RESTART mode. The diagnostic is not enabled. Each audio channel operates independently from each other. If any of the a.m. faults occurs, only the channel(s) interested is shut down. A check of the output status is made every 1 ms (fig. 14). Restart takes place when the overload is removed. 2)) DIAGNOSTIC mode. It is enabled via I2C bus and self activates if an output overload (such to cause the intervention of the short-circuit protection) occurs to the speakers outputs . Once activated, the diagnostics procedure develops as follows (fig. 15): - To avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output status is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not performed and the channel returns back active. - Instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a duration of about 100 ms is started. - After a diagnostic cycle, the audio channel interested by the fault is switched to RESTART mode. The relevant data are stored inside the device and can be read by the microprocessor. When one cycle has terminated, the next one is activated by an I2C reading. This is to ensure continuous diagnostics throughout the car-radio operating time. - To check the status of the device a sampling system is needed. The timing is chosen at microprocessor level (over half a second is recommended). Figure 14. Restart timing without Diagnostic Enable (Each 1mS time, a sampling of the fault is done)
Out
1-2mS 1mS 1mS 1mS 1mS
t
Overcurrent and short circuit protection intervention (i.e. short circuit to GND) Short circuit removed
Figure 15. Restart timing with Diagnostic Enable
1mS 100mS 1mS 1mS
t
Overcurrent and short Short circuit removed (i.e. short circuit to GND)
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TDA7562
As for SHORT TO GND / Vs the fault-detection thresholds remain unchanged from 30 dB to 16 dB gain setting. They are as follows:
S.C. to GND
x
Normal Operation
x
S.C. to Vs
0V
1.2V
1.8V
VS-1.8V
VS-1.2V
D01AU1253
VS
Concerning SHORT ACROSS THE SPEAKER , the threshold varies from 30 dB to 16 dB gain setting, since different loads are expected (either normal speaker's impedance or high impedance). The values in case of 30 dB gain are as follows:
S.C. across Load
x
Normal Operation
0V
0.5
1.5
Infinite
D01AU1254mod
If the Line-Driver mode (Gv= 16 dB and Line Driver Mode diagnostic = 1) is selected, the same thresholds will change as follows:
S.C. across Load
x
Normal Operation
0
1.5
4.5
infinite
D01AU1252mod
OUTPUT DC OFFSET DETECTION Any DC output offset exceeding 2V are signalled out. This inconvenient might occur as a consequence of initially defective or aged and worn-out input capacitors feeding a DC component to the inputs, so putting the speakers at risk of overheating. This diagnostic has to be performed with low-level output AC signal (or Vin = 0). The test is run with selectable time duration by microprocessor (from a "start" to a "stop" command): - START = Last reading operation or setting IB1 - D5 - (OFFSET enable) to 1 - STOP = Actual reading operation Excess offset is signalled out if persistent throughout the assigned testing time. This feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process. MULTIPLE FAULTS When more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one of them is initially read out. The others are notified after successive cycles of I2C reading and faults removal, provided that the diagnostic is enabled. The table below shows all the couples of double-fault possible. It should be taken into account that a short circuit
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TDA7562
with the 4 ohm speaker unconnected is considered as double fault.
Double fault table for Turn On Diagnostic S. GND (so) S. GND (so) S. GND (sk) S. Vs S. Across L. S. GND / / / S. GND (sk) S. GND S. GND / / S. Vs S. Vs + S. GND S. Vs S. Vs / S. Across L. S. GND S. GND S. Vs S. Across L.
S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted to ground (test-current source side= so, test-current sink side = sk). More precisely, so = CH+, sk = CH-. FAULTS AVAILABILITY All the results coming from I2Cbus, by read operations, are the consequence of measurements inside a defined period of time. If the fault is stable throughout the whole period, it will be sent out. To guarantee always resident functions, every kind of diagnostic cycles will be reactivate after any I2C reading operation. So, when the micro reads the I2C, a new cycle will be able to start, but the read data will come from the previous diag. cycle (i.e. The device is in turned On, with a short to Gnd, then the short is removed and micro reads I2C. The short to Gnd is still present in bytes, because it is the result of the previous cycle. If another I2C reading operation occurs, the bytes do not show the short). In general to observe a change in Diagnostic bytes, two I2C reading operations are necessary. I2C PROGRAMMING/READING SEQUENCES A correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as follows (after battery connection): TURN-ON: PIN2 > 7V --- 10ms --- (STAND-BY OUT + DIAG ENABLE) --- 500 ms (min) --- MUTING OUT TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STAND-BY IN) --- 10ms --- PIN2 = 0 Car Radio Installation: PIN2 > 7V --- 10ms DIAG ENABLE (write) --- 200 ms --- I2C read (repeat until All faults disappear). OFFSET TEST: Device in Play (no signal) -- OFFSET ENABLE - 30ms - I2C reading (repeat I2C reading until high-offset message disappears). FAST MUTING The muting time can be shortened to less than 1ms by setting (IB2) D5 = 1. This option can be useful in transient battery situations (i.e. during car engine cranking) to quickly turnoff the amplifier for avoiding any audible effects caused by noise/transients being injected by preamp stages.
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TDA7562
I2C BUS INTERFACE Data transmission from microprocessor to the TDA7562 and viceversa takes place through the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). Data Validity As shown by fig. 16, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW. Start and Stop Conditions As shown by fig. 17 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. Byte Format Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transferred first. Acknowledge The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 18). The receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that the SDAline is stable LOW during this clock pulse. * Transmitter - master (P) when it writes an address to the TDA7562 - slave (TDA7562) when the P reads a data byte from TDA7562 ** Receiver - slave (TDA7562) when the P writes an address to the TDA7562 - master (P) when it reads a data byte from TDA7562 Figure 16. Data Validity on the I2CBUS
SDA
SCL DATA LINE STABLE, DATA VALID CHANGE DATA ALLOWED
D99AU1031
Figure 17. Timing Diagram on the I2CBUS
SCL I2CBUS SDA
D99AU1032
START
STOP
Figure 18. Acknowledge on the I2CBUS
SCL 1 2 3 7 8 9
SDA MSB START
D99AU1033
ACKNOWLEDGMENT FROM RECEIVER
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TDA7562
SOFTWARE SPECIFICATIONS All the functions of the TDA7562 are activated by I2C interface. The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from P to TDA7562) or read instruction (from TDA7562 to P). Chip Address:
D7 1 1 0 1 1 0 0 D0 X D8 Hex
X = 0 Write to device X = 1 Read from device If R/W = 0, the P sends 2 "Instruction Bytes": IB1 and IB2. IB1
D7 D6 D5 D4 X Diagnostic enable (D6 = 1) Diagnostic defeat (D6 = 0) Offset Detection enable (D5 = 1) Offset Detection defeat (D5 = 0) Front Channel Gain = 30dB (D4 = 0) Gain = 16dB (D4 = 1) Rear Channel Gain = 30dB (D3 = 0) Gain = 16dB (D3 = 1) Mute front channels (D2 = 0) Unmute front channels (D2 = 1) Mute rear channels (D1 = 0) Unmute rear channels (D1 = 1) CD 2% (D0 = 0) CD 10% (D0 = 1)
D3 D2 D1 D0
IB2
D7 D6 D5 D4 D3 D2 D1 D0 X used for testing Normal muting time (D5 = 0) Fast muting time (D5 = 1) Stand-by on - Amplifier not working - (D4 = 0) Stand-by off - Amplifier working - (D4 = 1) Power amplifier mode diagnostic (D3 = 0) Line driver mode diagnostic (D3 = 1) X X X
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TDA7562
If R/W = 1, the TDA7562 sends 4 "Diagnostics Bytes" to P: DB1, DB2, DB3 and DB4. DB1
D7 D6 D5 D4 D3 Thermal warning active (D7 = 1) Diag. cycle not activated or not terminated (D6 = 0) Diag. cycle terminated (D6 = 1) X X Channel LF Normal load (D3 = 0) Short load (D3 = 1) Channel LF No output offset (D2 = 0) Output offset detection (D2 = 1) Channel LF No short to Vcc (D1 = 0) Short to Vcc (D1 = 1) Channel LF No short to GND (D1 = 0) Short to GND (D1 = 1)
D2
D1
D0
DB2
D7 D6 D5 D4 D3 Offset detection not activated (D7 = 0) Offset detection activated (D7 = 1) X X X Channel LR Normal load (D3 = 0) Short load (D3 = 1) Channel LR No output offset (D2 = 0) Output offset detection (D2 = 1) Channel LR No short to Vcc (D1 = 0) Short to Vcc (D1 = 1) Channel LR No short to GND (D1 = 0) Short to GND (D1 = 1)
D2
D1
D0
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TDA7562
B3
D7 D6 D5 D4 Stand-by status (= IB1 - D4) Diagnostic status (= IB1 - D6) X Channel RF Turn-on diagnostic (D4 = 0) X Channel RF Normal load (D3 = 0) Short load (D3 = 1) Channel RF No output offset (D2 = 0) Output offset detection (D2 = 1) Channel RF No short to Vcc (D1 = 0) Short to Vcc (D1 = 1) Channel RF No short to GND (D1 = 0) Short to GND (D1 = 1)
D3
D2
D1
D0
DB4
D7 D6 D5 D4 D3 X X X X Channel RR RNormal load (D3 = 0) Short load (D3 = 1) Channel RR No output offset (D2 = 0) Output offset detection (D2 = 1) Channel RR No short to Vcc (D1 = 0) Short to Vcc (D1 = 1) Channel RR No short to GND (D1 = 0) Short to GND (D1 = 1)
D2
D1
D0
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TDA7562
Examples of bytes sequence 1 - Turn-On of the power amplifier with 30dB gain, mute on, diagnostic defeat, CD = 2%.
Start Address byte with D0 = 0 ACK IB1 X0000000 ACK IB2 XXX1XX11 ACK STOP
2 - Turn-Off of the power amplifier
Start Address byte with D0 = 0 ACK IB1 X0XXXXXX ACK IB2 XXX0XXXX ACK STOP
3 - Offset detection procedure enable
Start Address byte with D0 = 0 ACK IB1 XX1XX11X ACK IB2 XXX1XXXX ACK STOP
4 - Offset detection procedure stop and reading operation (the results are valid only for the offset detection bits (D2 of the bytes DB1, DB2, DB3, DB4).
Start
s s
Address byte with D0 = 1
ACK
DB1
ACK
DB2
ACK
DB3
ACK
DB4
ACK
STOP
The purpose of this test is to check if a D.C. offset (2V typ.) is present on the outputs, produced by input capacitor with anomalous leackage current or humidity between pins. The delay from 4 to 5 can be selected by software, starting from T.B.D. ms
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TDA7562
DIM. A B C D E F (1) G G1 H (2) H1 H2 H3 L (2) L1 L2 (2) L3 L4 L5 M M1 N O R R1 R2 R3 R4 V V1 V2 V3 mm TYP. 4.50 1.90 1.40 0.90 0.39 1.00 26.00 29.23 17.00 12.80 0.80 22.47 18.97 15.70 7.85 5 3.5 4.00 4.00 2.20 2 1.70 0.5 0.3 1.25 0.50 inch TYP. 0.177 0.074 0.055 0.035 0.015 0.040 1.023 1.150 0.669 0.503 0.031 0.884 0.747 0.618 0.309 0.197 0.138 0.157 0.157 0.086 0.079 0.067 0.02 0.12 0.049 0.019
MIN. 4.45 1.80 0.75 0.37 0.80 25.75 28.90
MAX. 4.65 2.00 1.05 0.42 0.57 1.20 26.25 29.30
MIN. 0.175 0.070 0.029 0.014 0.031 1.014 1.139
MAX. 0.183 0.079 0.041 0.016 0.022 0.047 1.033 1.153
OUTLINE AND MECHANICAL DATA
22.07 18.57 15.50 7.70
22.87 19.37 15.90 7.95
0.869 0.731 0.610 0.303
0.904 0.762 0.626 0.313
3.70 3.60
4.30 4.40
0.145 0.142
0.169 0.173
5 (Typ.) 3 (Typ.) 20 (Typ.) 45 (Typ.)
Flexiwatt27 (vertical)
(1): dam-bar protusion not included (2): molding protusion included
V C B V H H1 H3 H2 R3 R4 V1 R2 R L L1 A
V3
L4
O
L2
N
L3
V1
V2
R2 L5 G G1 F
R1 R1 R1 E
FLEX27ME
D
Pin 1
M
M1
7139011
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TDA7562
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2003 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
(R)
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